Microprocessor - 80286

Posted by Harisinh | Posted in | Posted on 4:33 AM

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The 80286 is called the second generation of microprocessor, it is more advanced to the 80186. This is the first Intel microprocessor offering multitasking and virtual memory. It is a 16-bit processor capable of addressing up to 16 MB (as it had an address but of 24-bits) of RAM and could also work with virtual memory (1GB). . It had a prefetch queue of 6 instructions. The 286 is the first “real” processor. It introduced the concept of protected mode and real mode. To ensure proper operation, we must protect the operating system and all other programs and the shared resources. The approach taken by many operating systems provide hardware support that allows us to differentiate among various modes of operation. A bit called the mode bit is added to the hardware of the computer to indicate the current mode. With the mode bit, we are able to distinguish between a task that is executed on behalf of the operating system and one that is executed on behalf of the user. The dual mode of operation provides us with the means for protecting the operating system from errant users. This is accomplished by designing some of the machine instructions that may cause harm as “privileged instructions”, these instructions are executed only in monitor mode. The 286 had an extra register called the Machine Status Register (MSW) whose lower nibble (containing D3 D2 D1 D0) defined the mode of operation and moreover it uses a four level memory protection which is an extension of the user/supervisory (protected/real) mode concept. It also had on-chip Memory Management Unit (MMU). This is also the first Intel processor that could run all of the software written for its predecessor. It has 134,000 transistors and could run at 6 to 12.5MHz

Pentium PRO

Posted by Harisinh | Posted in | Posted on 4:32 AM

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Towards the end of 1995 the Pentium Pro was announced. This Pentium introduced a new socket (Socket 8), utilizing 387 pins. The Pro series included ability to run multiple instructions in one cycle, could execute instructions out of order, and had dynamic branch prediction, as well as speculative execution. Also included was an
impressive cache arrangement. For programmers, the Pro looks like a classic CISC CPU, while internally the CPU is very RISC oriented in design.

This 3.3 Volt CPU (3.1V at 150 MHz) was designed with a 32-bit operating system (OS) such as Windows NT in mind. While the Pro had Level 1 cache in the CPU, its real forte was the integrated Level 2 cache which allowed upwards of 1MB of cache to reside inside the CPU packaging to run at processor speed. This really improved performance in SMP based system boards. The Pro chip was the first chip to be offered in the AT or the ATX format.

The ATX format was preferred, as the Pro consumed more than 25 W of power, which generated a fair amount of heat. There were several major improvements of Pentium pro over Pentium, for example it had a superscalar architecture (microprocessor architecture containing more than one execution unit), 12-stage super pipeline, internal micro-ops similar to RISC like instructions and internal thermal protection. This microprocessor could be clocked to 200.00 MHz and consisted of 5.5 million transistors.


Pentium PRO Microprocessor

Microprocessor - 80386

Posted by Harisinh | Posted in | Posted on 4:32 AM

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The 80386 is the first popular 32-bit microprocessor. IA-32 first appeared with the 80386 processor, but the architecture was by no means completely new. IA-32’s 8-bit predecessor first appeared in the Datapoint 2200 programmable terminal, released in 1971.

It wasn’t just an evolutionary product in Intel’s growing family of microprocessors; it was revolutionary. It is a 32-bit chip that contained 275,000 transistors, could process five million instructions per second, and could run all popular operating systems, including Windows. It is also “multitasking,” meaning it could run multiple programs at the same time.

It has a pre-fetch queue length of 16 bytes. It has extensive memory management capabilities. It incorporates a sophisticated technique known as paging, in addition to the segmentation technique, for achieving virtual memory. The 80386 provided a new mode, virtual 8086 mode, in which real-mode programs could run while the processor was in protected mode. To support the concept of virtual memory to a grater extend it also has on-chip address translation unit. This, combined with a more flexible segmentation scheme and a larger addressable memory space (32 bits rather than 24, bring the total addressable memory to 4GB from 16MB and a virtual address space of 64 TB) has made 80386 protected mode the mode of choice for all modern operating systems.

Later IA-32 implementations have not made significant changes or enhancements to protected mode. IA-32 adds the extended registers EAX, ECX, EDX, EBX, EBP, ESP, ESI, EDI, EIP, and EFLAGS, as well as two additional, segment registers FS and GS. Originally all registers were special-purpose. For example, AX is originally an accumulator and could only be used as such. IA-32 lifted many of the restrictions on register usage, but some remain. For example, some instructions assume that a pointer in the EBX register is relative to the segment indexed by DS. In practice, 6 registers are available for generalpurpose use, far fewer than the number available in the ARM or IA-64 architectures.

The practical result of this register pressure is that IA-32 programs tend to make more frequent use of the stack for temporary storage. The 80386 has automatic self-test this feature is known as ‘Built-In-Self-Test’ (BIST). The BIST tests approximately one-half of the 80386 which includes the internal control ROM. After successful completion of BIST, the 80386 forms reset sequence after which it will start from the reset vector.



Microprocessor - 80386

Pentium 2

Posted by Harisinh | Posted in | Posted on 4:45 AM

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This CPU had remarkable performance. The challenge Intel faced was the cost of production creating the Pro chip. The built-in L2 cache had a high failure rate at Intel fabrication plants. They came up with the Pentium II (P2). Intel began by separating the processor, and cache of the Pentium Pro, mounting them together on the circuit board with a big heat sink.

Then by dropping the whole assembly onto the system board, using a Single Edge Contact (SEC) with 242 pins in the slot, and adding the 57 MMX (Multimedia extension) micro-code instructions, then Intel had the Pentium II. This way, defective cache modules don't force throwing out of a perfectly good CPU, because of a bad cache. And to further improve cache yields, the Pentium II ran cache at half the speed of the CPU.


Pentium II uses the Dynamic Execution Technology, which consists of three different facilities; Multiple branch prediction predicts program execution through several branches, accelerating the flow of work to the processor, Dataflow Analysis creates an optimized, reordered schedule f instructions by analyzing data dependencies between instructions and Speculative Execution carries out instructions speculatively thereby ensures that the multiple execution unit remains busy, boosting overall performance.

Pentium II includes data integrity and reliability features such as Error Correction Code (ECC), Fault Analysis, Recovery and Functional Redundancy Checking for both system and L2 cache buses. The pipelined Floating-Point Unit (FPU) supports the 32-bit and 64-bit formats specified in IEEE standard 754, as well as an 80-bit format. Parityprotected address/request and response system bus signals with a retry mechanism for high data integrity and reliability. An on-die diode monitors the die temperature.

A thermal sensor located on the motherboard can monitor the die temperature of the Pentium II processor for thermal management purposes. This microprocessor could work at clock rates of 300MHz and is made up of 7.5 million transistors.


Pentium 2 Microprocessor.

Pentium 3

Posted by Harisinh | Posted in | Posted on 4:33 AM

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Similar to Pentium II, the Pentium III processor also uses a Dynamic Execution micro-architecture: a unique combination of multiple branch prediction, data flow analysis, and speculative execution. The Pentium III has two major differences with Pentium II: Improved MMX and Processor serial number feature.

The improved MMX has totally 70 instructions enabling advanced imaging, 3D streaming audio and video, and speech recognition for enhanced Internet Experience: technology instructions for enhanced media and communication performance. Additionally, Streaming SIMD (single-instruction, multiple data) Extensions for enhanced floating point and 3-D application performance.

It also consisted of Internet Streaming SIMD Extensions which consisted of 70 instructions and includes single instruction, multiple data for loating-point, additional SIMD integer and cacheability control instructions. Data Pre-fetch Logic anticipates the data needed by the application programs and pre-loads into the Advanced Transfer Cache increasing performance.


The processor has multiple low power states such as Sleep, and Deep to conserve power during idle times. The system bus runs at 100MHz and 133MHzallowing for a 33% increase in available bandwidth to the processor. The Processor Serial Number extends the concept of processor identification by providing a 96-bit software accessible processor number that may be used by applications to identify a system. Applications include membership authentication, data backup/restore protection, removable storage data protection, and managed access to files.

Pentium 3 Microprocessor.

Pentium 4

Posted by Harisinh | Posted in | Posted on 4:33 AM

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The Pentium 4 processor is Intel’s microprocessor that was introduced at 1.5GHz in November of 2000. It implements the new Intel NetBurst micro-architecture that features significantly higher clock rates and world-class performance. It includes several important new features and innovations that will allow the Intel pentium 4 processor to deliver industry-leading performance for the next several years. The Pentium 4 processor is designed to deliver performance across applications
where end users can truly appreciate and experience its performance.

For example, it allows a much better user experience in areas such as Internet audio and streaming video, image processing, video content creation, speech recognition, 3D applications and games, multi-media and multi-tasking user environments. The Pentium 4 processor enables realtime MPEG2 video encoding and near real-time MPEG4 encoding, allowing efficient video editing and video conferencing. It delivers world-class performance on 3D applications and games.

It adds 144 new 128-bit Single Instruction Multiple Data (SIMD) instructions called SSE2 (Streaming SIMD Extension 2) that improves performance for multi-media, content creation, scientific, and engineering applications. Intel NetBurst micro-architecture of the Pentium 4 processor has four main sections: the in-order front end, the out-of-order execution engine, the integer and floating-point execution units, and the memory subsystem.

The Pentium 4 processor has a 20-stage misprediction pipeline while the 6 micro-architecture has a 10-stage misprediction (This pipeline covers the cycles it takes a processor to recover from a branch that went a different direction than the early fetch hardware predicted at the beginning of the machine pipeline) pipeline. By dividing the pipeline into smaller pieces, doing less work during each pipeline stage (fewer gates of logic), the clock rate can be a lot higher. The Pentium 4 processor has a system bus with 3.2 G-bytes per second of bandwidth. This high bandwidth is a key enabler for applications that stream data from memory.

This bandwidth is achieved with a 64-bit wide bus capable of transferring data at a rate of 400MHz. It uses a source-synchronous protocol that quad-pumps the 100MHz bus to give 400 million data transfers per second. It has a split-transaction, deeply pipelined protocol to allow the memory subsystem to overlap many simultaneous requests to actually deliver high memory bandwidths in a real system. The bus protocol has a 64- byte access length. The Pentium 4 processor has 42 million transistors implemented on Intel’s 0.18u CMOS process, with six levels of aluminum interconnect.


Pentium 4 Microprocessor.