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The 80486s were not groundbreaking in terms of a radically different design philosophy, like the 80386. It did have four new features that made the 80486 about twice as fast as the fastest 80386. The most talked about new features were a built-in cache, (when the processor speeds reached the 20-25 MHz vicinity, reasonably priced DRAM memory could no longer be accessed with zero wait bus cycles) and a built-in math co processor (increased the throughput for floating point operations). On average, the math co processor built into the 80486 yielded three times the greater performance than external 80387 Numeric Processing Unit (NPU). The speed difference between the 80386 and the 80486 made the Graphical User Interface (GUI) practical for everyday use.

A concept which is known as, Unified Internal Code/Data Cache is used in 80486. It incorporates the advantage of the external cache coupled with the fact that every time a memory request is fulfilled by the internal cache, one less bus cycle results. In addition, the access of data is much faster since the only delay would be to look up the data/code and to deliver it to the internal requester. This also frees up the bus for other bus masters. The address bus in 486 is bi-directional because of the presence of cache memory inside 486 (to enable cache invalidation). It also supports burst type of bus cycle which saves time during floating point operand fetch as well as cache memory fill.

Internal data conversion logic for both 8-bit subsystem and 16-bit subsystems; dynamic bus sizing supporting 8, 16 and 32 bit cycles. The 386 does not support direct interfacing of 8 bit subsystem. An external logic is needed for this purpose. The 486 incorporates several features in order to simplify the debugging process. The on-chip debugging aids of 486 are of three types: Breakpoint instruction, Single-set capability by Trap and Code and data breakpoint capability by means of debug register.

The 486 also has a parity generator and parity checker inside it, providing parity logic for Data bus ne parity bit for each data byte. This offers better reliability. It consists of 1.2 million transistors and could run at clock rates of 50MHz.


Mircoprocessor - 80486

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Cyrix and AMD are out in the marketplace selling their CPUs and math co processors, calling them 80386, 80387, just like Intel's. As any one can guess, Intel is not happy about this. The firm was so mad; they went to court to stop their competitors but one cannot copyright or patent numbers, the judge says. So Intel runs a contest to ome up with a name for the 80586 that isn't a number.

Penta means five, and on the 19th of October 1992, the name Pentium was announced. Thus the Pentium began as the fifth generation of the Intel x86 architecture. The Pentium had an L2 cache from 256KB to 1MB, used a 50, 60 or 66MHz system bus and contained from 3.1 to 3.3 million transistors. As usual, the Pentium was backward compatible, while offering new features.

The revolutionary step in this CPU was twin data pipelines. This enabled the CPU to execute two instructions at the same time. This is known as super scalar technology, typically found in RISC based CPUs. The Pentium uses a 32-bit expansion bus, however the data bus is 64-bits which means the system memory is addressed at 64 bits at a time. This is an important distinction to remember when working with some types of RAM packaging.


Pentium Microprocessor.

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By 1982 Intel came up with 80186 and 80286, two products compatible with the 8086 and 8088. The 80186, designed by a team under the leadership of Dave Stamm, integrated onto the CPU a number of functions previously implemented in peripheral chips, producing higher reliability and faster operations speeds at less cost. It had a prefetch queue of 6 instructions.

It is suitable for high volume applications such as computer workstations, word processor and personal computers. When compared with the previous microprocessors on chip, clock oscillator, interrupt controller, two DMA channels (with all support), chip select logic with operating modes (iRMX186 for master mode and Non iRMX186 for slave mode this is similar to min and max modes in 8086), and three timers. Moreover there were ten extra instructions added to this microprocessor which are, PUSHA and POPA (to push and pop all the registers), IMUL destination, source, #immediate (an instruction of this type didn’t exist in the previous µp), SHIFT / ROTATE destination register, #immediate (this instruction could shift or rotate a register contents given number of times), INS / OUTS (for input and output of a string, ex- INS DS:DI and OUTS DS DS:SI), other three instructions were required for operating system (a concept which became very prominent and still is from the starting days of microprocessors) ENTER, LEAVE and BOUND.

It is made up of 134,000 MOS transistor to form 16-bit microprocessors with a 16-bit data bus, 20-bit address bus (could address only 1M byte of memory) and could work at clock rates of 4 and 6 MHz. This processor is called the first generation of microprocessors.


Microprocessor 80186.

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Finally in 1971 the team of Ted Hoff, S. Mazor and F. Fagin develops the Intel 4004 microprocessor a “computer on a chip”. This 4004, is the world’s first commercially available microprocessor. This breakthrough invention powered the Busicom calculator and paved the way for embedding intelligence in inanimate objects as well as the personal computer.

Just four years later, in 1975, Fortune magazine said, “The microprocessor is one of those rare innovations that simultaneously cuts manufacturing costs and ads to the value and capabilities of the product. As a result, the microprocessor has invaded a host of existing products and created new products never before possible.” This single invention revolutionized the way computers are designed and applied. It put intelligence into “dumb” machines and distributed processing capability into previously undreamed applications.

The advent of intelligent machines based on microprocessors changed how we gather information, how we communicate, and how and where we work. In mid-1969 Busicom, a now-defunct Japanese calculator manufacturer, asked Intel to design a set of chips for a family of high-performance programmable calculators. Maracian E. “Ted” Hoff, an engineer who had joined Intel the previous year was assigned to the project. In its original design, the calculator required twelve chips, which Hoff considered to complex to be cost-effective. Furthermore, Intel’s small MOS staff was fully occupied with the 1101 (MOS type of static semiconductor memory) so the design resources were not available.

Hoff came up with a novel alternative: by reducing the complexity of the instructions and providing a supporting memory device, he could create a general-purpose information processor. The processor, he reasoned, could find a wide array of uses for which it could be modified by programs stored in memory. “Instead of making their device act like a calculator,” he recalled, “I wanted to make it function as a general purpose computer programmed to be a calculator.” To this end, Hoff and fellow engineers Federico Faggin and Stan Mazor came up with a design that involved four chips: a central processing unit (CPU) chip, a read-only memory (ROM) chip for the custom application programs, a random access memory (RAM) chip for processing data, and a shift register chip for input/output (I/O) port.

The CPU chip, though it then had no name, would eventually be called a microprocessor. Measuring one-eighth of an inch wide by one-sixth of an inch long and made up of 2,300 MOS transistors, Intel’s first microprocessor is equal in computing power to the first electronic computer, ENIAC, which filled 3000 cubic feet with 18,000 vacuum tubes. The 4004, as it is to be called, would execute 60,000 operations a second, with by today’s standards is primitive. It works at a clock rate of 108 KHz.


Microprocessor 4004.

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The 8-bit 8008 microprocessor had been developed in tandem with the 4004 and was introduced in April 1972. It was intended to be a custom chip for Computer Terminals Corp. of Texas. But as it developed, CTC rejected the 8008 because it was too slow for the company’s purpose and required too many supporting chips.

However, Intel offered the 8008 on the open market, where its orientation to data/character manipulation versus the 4004’s arithmetic orientation caught the eye of a new group of users. The 008 is made up of 3,500 MOS transistors and could work at a clock rate of 200 KHz.


This what a little information about the 8008.
Microprocessor 8008.

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It soon became obvious to Intel and its competitors that there were almost limitless number of applications for microprocessors. A big advance came in 1974 with Intel’s 8080 chip, the first true general purpose microprocessor.

It is much more highly ntegrated chip than its predecessors, with about 10 times the performance. It could execute about 290,000 operations a second and could address 64K bytes of memory. Both the 4004 and 8008 utilized the P-channel MOS technology, whereas the 8080 used the innovative N-channel MOS process yielding vast gains in speed, power, capacity and density.

What’s more the 8080 required only 6 support chips for operation as opposed to 20 with the 8008. It consisted of 60,000 transistors and worked at clock rate of 2 MHz.


Microprocessor 8080.

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In 1976 Intel decided to embark on a 16-bit project and the result was 8086 which came-in to market in 1978. 8086 is a 16-bit device with 10 times the erformance of the 8080. It is build as an extension of the 8080’s architectural concepts, making it easier for customers to use and for Intel market.

In this microcontroller first time pipelining was introduced which furthermore increased the execution speed. Segmentation of memory i.e. dividing the memory space in to different segments for example code , data and stack segment was introduced for the first time. This segmentation of memory enabled the microprocessor to address the memory even though it had no register which could hold 20 bit address.

This was done using two registers base register and offset register to which a 0H had been hard wired in to the register as the lower nibble of base register and the higher nibble of offset register. Thus when we add both of the register we get a 20-bit address. It had a pre-fetch queue of 6 instructions where in the instructions which were to be executed were fetching during execution of an instruction.

Its architecture is designed to support parallel processing. It is made up of 29,000 MOS transistors and could work at clock rates of 5 to 10 MHz. It has a 16-bit ALU (Arithmetic and Logic Unit) and data bus but the width of address bus is 20-bit (could address only 1M byte of memory).


Microprocessor 8086.